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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tcasI/XuGJZCL24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bo_Xu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hang_Geng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kai_Chen_0018>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leping_Jiang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Songting_Zou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhen_Liu_0003>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTCSI.2023.3348765>
foaf:homepage <https://doi.org/10.1109/TCSI.2023.3348765>
dc:identifier DBLP journals/tcasI/XuGJZCL24 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTCSI.2023.3348765 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tcasI>
rdfs:label FPGA Implementation of Memristor Emulators Using Fractional Order Calculus: A High-Precision Reconfigurable Approach. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bo_Xu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hang_Geng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kai_Chen_0018>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leping_Jiang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Songting_Zou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhen_Liu_0003>
swrc:month April (xsd:string)
swrc:number 4 (xsd:string)
swrc:pages 1615-1627 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tcasI/XuGJZCL24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tcasI/XuGJZCL24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tcasI/tcasI71.html#XuGJZCL24>
rdfs:seeAlso <https://doi.org/10.1109/TCSI.2023.3348765>
dc:title FPGA Implementation of Memristor Emulators Using Fractional Order Calculus: A High-Precision Reconfigurable Approach. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 71 (xsd:string)