Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcasII/OhPKCJ23
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tcasII/OhPKCJ23
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Juhyun_Park
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Keonhee_Cho
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Seong-Ook_Jung
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tae_Hyun_Kim
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Tae_Woo_Oh
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FTCSII.2022.3206478
>
foaf:
homepage
<
https://doi.org/10.1109/TCSII.2022.3206478
>
dc:
identifier
DBLP journals/tcasII/OhPKCJ23
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FTCSII.2022.3206478
(xsd:string)
dcterms:
issued
2023
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tcasII
>
rdfs:
label
Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Juhyun_Park
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Keonhee_Cho
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Seong-Ook_Jung
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tae_Hyun_Kim
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Tae_Woo_Oh
>
swrc:
number
1
(xsd:string)
swrc:
pages
306-310
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tcasII/OhPKCJ23/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tcasII/OhPKCJ23
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tcasII/tcasII70.html#OhPKCJ23
>
rdfs:
seeAlso
<
https://doi.org/10.1109/TCSII.2022.3206478
>
dc:
title
Local Bit-Line SRAM Architecture With Data-Aware Power-Gating Write Assist.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
70
(xsd:string)