A DVB-H receiver and gateway implementation on a FPGA- and DSP-based platform.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tce/LoboJPMR11
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A DVB-H receiver and gateway implementation on a FPGA- and DSP-based platform.
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A DVB-H receiver and gateway implementation on a FPGA- and DSP-based platform.
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