Fast Block Motion Estimation With 8-Bit Partial Sums Using SIMD Architectures.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tcsv/DuanmuAS07
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Fast Block Motion Estimation With 8-Bit Partial Sums Using SIMD Architectures.
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Fast Block Motion Estimation With 8-Bit Partial Sums Using SIMD Architectures.
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