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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tecs/MangerucaBFS07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alberto_Ferrari>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alberto_L._Sangiovanni-Vincentelli>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Leonardo_Mangeruca>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Massimo_Baleani>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1324969.1324975>
foaf:homepage <https://doi.org/10.1145/1324969.1324975>
dc:identifier DBLP journals/tecs/MangerucaBFS07 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1324969.1324975 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tecs>
rdfs:label Uniprocessor scheduling under precedence constraints for embedded systems design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alberto_Ferrari>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alberto_L._Sangiovanni-Vincentelli>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Leonardo_Mangeruca>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Massimo_Baleani>
swrc:number 1 (xsd:string)
swrc:pages 6:1-6:30 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tecs/MangerucaBFS07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tecs/MangerucaBFS07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tecs/tecs7.html#MangerucaBFS07>
rdfs:seeAlso <https://doi.org/10.1145/1324969.1324975>
dc:subject Real-time scheduling, design of embedded systems, embedded software, precedence constraints (xsd:string)
dc:title Uniprocessor scheduling under precedence constraints for embedded systems design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 7 (xsd:string)