Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tecs/MarinelliPTKGC22
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Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices.
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Microarchitectural Exploration of STT-MRAM Last-level Cache Parameters for Energy-efficient Devices.
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