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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tecs/ProcterHGBA17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Adam_M._Procter>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gerard_Allwein>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ian_Graves>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michela_Becchi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/William_L._Harrison>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2967497>
foaf:homepage <https://doi.org/10.1145/2967497>
dc:identifier DBLP journals/tecs/ProcterHGBA17 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2967497 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tecs>
rdfs:label A Principled Approach to Secure Multi-core Processor Design with ReWire. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Adam_M._Procter>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gerard_Allwein>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ian_Graves>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michela_Becchi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/William_L._Harrison>
swrc:number 2 (xsd:string)
swrc:pages 33:1-33:25 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tecs/ProcterHGBA17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tecs/ProcterHGBA17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tecs/tecs16.html#ProcterHGBA17>
rdfs:seeAlso <https://doi.org/10.1145/2967497>
dc:title A Principled Approach to Secure Multi-core Processor Design with ReWire. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 16 (xsd:string)