Energy savings and speedups from partitioning critical software loops to hardware in embedded systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tecs/StittVN04
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https://dblp.l3s.de/d2r/resource/authors/Greg_Stitt
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https://dblp.l3s.de/d2r/resource/authors/Shawn_Nematbakhsh
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2004
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Energy savings and speedups from partitioning critical software loops to hardware in embedded systems.
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1
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218-232
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dc:
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FPGA, Hardware/software partitioning, embedded systems, low energy, platforms, speedup, synthesis
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Energy savings and speedups from partitioning critical software loops to hardware in embedded systems.
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