Algorithm/Architecture Co-optimisation Technique for Automatic Data Reduction of Wireless Read-Out in High-Density Electrode Arrays.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tecs/YassinCKSCKH18
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Algorithm/Architecture Co-optimisation Technique for Automatic Data Reduction of Wireless Read-Out in High-Density Electrode Arrays.
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Algorithm/Architecture Co-optimisation Technique for Automatic Data Reduction of Wireless Read-Out in High-Density Electrode Arrays.
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