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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tecs/ZhangVL04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chuanjun_Zhang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Frank_Vahid>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roman_L._Lysecky>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F993396.993405>
foaf:homepage <https://doi.org/10.1145/993396.993405>
dc:identifier DBLP journals/tecs/ZhangVL04 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F993396.993405 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tecs>
rdfs:label A self-tuning cache architecture for embedded systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chuanjun_Zhang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Frank_Vahid>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roman_L._Lysecky>
swrc:number 2 (xsd:string)
swrc:pages 407-425 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tecs/ZhangVL04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tecs/ZhangVL04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tecs/tecs3.html#ZhangVL04>
rdfs:seeAlso <https://doi.org/10.1145/993396.993405>
dc:subject Cache, architecture tuning, configurable, dynamic optimization, embedded systems, low energy, low power, on-chip CAD (xsd:string)
dc:title A self-tuning cache architecture for embedded systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 3 (xsd:string)