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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/thipeac/MahoneySBP09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guy_Bois>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Patrice_Plante>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Patrick_Mahoney>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yvon_Savaria>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-642-00904-4%5F16>
foaf:homepage <https://doi.org/10.1007/978-3-642-00904-4_16>
dc:identifier DBLP journals/thipeac/MahoneySBP09 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-642-00904-4%5F16 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guy_Bois>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Patrice_Plante>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Patrick_Mahoney>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yvon_Savaria>
swrc:pages 307-325 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/journals/thipeac/2009-2>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/thipeac/MahoneySBP09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/thipeac/MahoneySBP09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/thipeac/thipeac2.html#MahoneySBP09>
rdfs:seeAlso <https://doi.org/10.1007/978-3-642-00904-4_16>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/thipeac>
dc:title Performance Characterization for the Implementation of Content Addressable Memories Based on Parallel Hashing Memories. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document
swrc:volume 2 (xsd:string)