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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tim/SabatiniBL19>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Lidozzi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Marco_Di_Benedetto_0002>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Valerio_Sabatini>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTIM.2018.2884556>
foaf:homepage <https://doi.org/10.1109/TIM.2018.2884556>
dc:identifier DBLP journals/tim/SabatiniBL19 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTIM.2018.2884556 (xsd:string)
dcterms:issued 2019 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tim>
rdfs:label Synchronous Adaptive Resolver-to-Digital Converter for FPGA-Based High-Performance Control Loops. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Alessandro_Lidozzi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Marco_Di_Benedetto_0002>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Valerio_Sabatini>
swrc:number 10 (xsd:string)
swrc:pages 3972-3982 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tim/SabatiniBL19/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tim/SabatiniBL19>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tim/tim68.html#SabatiniBL19>
rdfs:seeAlso <https://doi.org/10.1109/TIM.2018.2884556>
dc:title Synchronous Adaptive Resolver-to-Digital Converter for FPGA-Based High-Performance Control Loops. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 68 (xsd:string)