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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tjs/KakarountasMMGT06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Athanasios_Kakarountas>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Athanasios_Milidonis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Costas_E._Goutis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_Theodoridis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Haralambos_Michail>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2Fs11227-006-5682-5>
foaf:homepage <https://doi.org/10.1007/s11227-006-5682-5>
dc:identifier DBLP journals/tjs/KakarountasMMGT06 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2Fs11227-006-5682-5 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tjs>
rdfs:label High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Athanasios_Kakarountas>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Athanasios_Milidonis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Costas_E._Goutis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Theodoridis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Haralambos_Michail>
swrc:number 2 (xsd:string)
swrc:pages 179-195 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tjs/KakarountasMMGT06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tjs/KakarountasMMGT06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tjs/tjs37.html#KakarountasMMGT06>
rdfs:seeAlso <https://doi.org/10.1007/s11227-006-5682-5>
dc:subject Security; hash function; hardware implementation; high-speed performance; FPGA (xsd:string)
dc:title High-Speed FPGA Implementation of Secure Hash Algorithm for IPSec and VPN Applications. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 37 (xsd:string)