On Interaction between Interconnection Network Design and Latency Hiding Techniques in Multiprocessors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tjs/KimV00
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tjs/KimV00
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Alexander_V._Veidenbaum
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dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Sunil_Kim
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http://dx.doi.org/doi.org%2F10.1023%2FA%3A1008113009823
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dc:
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DBLP journals/tjs/KimV00
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dc:
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2000
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On Interaction between Interconnection Network Design and Latency Hiding Techniques in Multiprocessors.
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swrc:
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3
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swrc:
pages
197-216
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dc:
subject
prefetching; weak consistency; interconnection networks
(xsd:string)
dc:
title
On Interaction between Interconnection Network Design and Latency Hiding Techniques in Multiprocessors.
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