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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tmscs/Mal-SarkarKNGKB16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anandaroop_Ghosh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aswin_Raghav_Krishna>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_Karam>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sanchita_Mal-Sarkar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seetharam_Narasimhan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Swarup_Bhunia>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTMSCS.2016.2584052>
foaf:homepage <https://doi.org/10.1109/TMSCS.2016.2584052>
dc:identifier DBLP journals/tmscs/Mal-SarkarKNGKB16 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTMSCS.2016.2584052 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tmscs>
rdfs:label Design and Validation for FPGA Trust under Hardware Trojan Attacks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anandaroop_Ghosh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aswin_Raghav_Krishna>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_Karam>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sanchita_Mal-Sarkar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seetharam_Narasimhan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Swarup_Bhunia>
swrc:number 3 (xsd:string)
swrc:pages 186-198 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tmscs/Mal-SarkarKNGKB16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tmscs/Mal-SarkarKNGKB16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tmscs/tmscs2.html#Mal-SarkarKNGKB16>
rdfs:seeAlso <https://doi.org/10.1109/TMSCS.2016.2584052>
dc:title Design and Validation for FPGA Trust under Hardware Trojan Attacks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 2 (xsd:string)