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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tnn/ShyuLWL08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kuo-Kai_Shyu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ming-Huan_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Po-Lei_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yu-Te_Wu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTNN.2007.915115>
foaf:homepage <https://doi.org/10.1109/TNN.2007.915115>
dc:identifier DBLP journals/tnn/ShyuLWL08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTNN.2007.915115 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tnn>
rdfs:label Implementation of Pipelined FastICA on FPGA for Real-Time Blind Source Separation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kuo-Kai_Shyu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ming-Huan_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Po-Lei_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yu-Te_Wu>
swrc:number 6 (xsd:string)
swrc:pages 958-970 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tnn/ShyuLWL08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tnn/ShyuLWL08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tnn/tnn19.html#ShyuLWL08>
rdfs:seeAlso <https://doi.org/10.1109/TNN.2007.915115>
dc:title Implementation of Pipelined FastICA on FPGA for Real-Time Blind Source Separation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 19 (xsd:string)