Hardware/software synthesis of formal specifications in codesign of embedded systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/CarchioloMM00
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/todaes/CarchioloMM00
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Giuseppe_Mangioni
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dc:
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<
https://dblp.l3s.de/d2r/resource/authors/Michele_Malgeri
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dc:
creator
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https://dblp.l3s.de/d2r/resource/authors/Vincenza_Carchiolo
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http://dx.doi.org/doi.org%2F10.1145%2F348019.348093
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DBLP journals/todaes/CarchioloMM00
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dc:
identifier
DOI doi.org%2F10.1145%2F348019.348093
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dcterms:
issued
2000
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swrc:
journal
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https://dblp.l3s.de/d2r/resource/journals/todaes
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Hardware/software synthesis of formal specifications in codesign of embedded systems.
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https://dblp.l3s.de/d2r/resource/authors/Vincenza_Carchiolo
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swrc:
number
3
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swrc:
pages
399-432
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http://bibsonomy.org/uri/bibtexkey/journals/todaes/CarchioloMM00/dblp
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rdfs:
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http://dblp.uni-trier.de/db/journals/todaes/todaes5.html#CarchioloMM00
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seeAlso
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https://doi.org/10.1145/348019.348093
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dc:
subject
codesign, embedded system, hardware and software synthesis
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dc:
title
Hardware/software synthesis of formal specifications in codesign of embedded systems.
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