Technology mapping and architecture evalution for k/m-macrocell-based FPGAs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/CongHY05
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2005
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Technology mapping and architecture evalution for k/m-macrocell-based FPGAs.
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CPLD, FPGA, PLD, technology mapping
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Technology mapping and architecture evalution for k/m-macrocell-based FPGAs.
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