A verification system for transient response of analog circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/DastidarC07
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2007
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A verification system for transient response of analog circuits.
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Ana CTL, Analog circuits, equivalence checking, model checking, query language, transient response
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A verification system for transient response of analog circuits.
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