Model refinement for hardware-software codesign.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/GongGB97
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/todaes/GongGB97
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Daniel_Gajski
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dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Jie_Gong
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dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Smita_Bakshi
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foaf:
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http://dx.doi.org/doi.org%2F10.1145%2F250243.250247
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dc:
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DBLP journals/todaes/GongGB97
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dc:
identifier
DOI doi.org%2F10.1145%2F250243.250247
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dcterms:
issued
1997
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swrc:
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https://dblp.l3s.de/d2r/resource/journals/todaes
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rdfs:
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Model refinement for hardware-software codesign.
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foaf:
maker
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foaf:
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<
https://dblp.l3s.de/d2r/resource/authors/Smita_Bakshi
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swrc:
number
1
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swrc:
pages
22-41
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owl:
sameAs
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rdfs:
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http://dblp.uni-trier.de/db/journals/todaes/todaes2.html#GongGB97
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seeAlso
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https://doi.org/10.1145/250243.250247
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dc:
subject
functional model, implementation model, model refinement, sofware-hardware codesign
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dc:
title
Model refinement for hardware-software codesign.
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2
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