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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/HeWLWLG23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chang_Liu_0019>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Juan_Luo>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiang_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xu_He>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yang_Guo_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yao_Wang_0002>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3595637>
foaf:homepage <https://doi.org/10.1145/3595637>
dc:identifier DBLP journals/todaes/HeWLWLG23 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3595637 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label A Soft-Error Mitigation Approach Using Pulse Quenching Enhancement at Detailed Placement for Combinational Circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chang_Liu_0019>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Juan_Luo>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiang_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xu_He>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yang_Guo_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yao_Wang_0002>
swrc:month July (xsd:string)
swrc:number 4 (xsd:string)
swrc:pages 65:1-65:22 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/HeWLWLG23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/HeWLWLG23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes28.html#HeWLWLG23>
rdfs:seeAlso <https://doi.org/10.1145/3595637>
dc:title A Soft-Error Mitigation Approach Using Pulse Quenching Enhancement at Detailed Placement for Combinational Circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 28 (xsd:string)