Optimizing instruction TLB energy using software and hardware techniques.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/KadayifSKKC05
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2005
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Optimizing instruction TLB energy using software and hardware techniques.
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229-257
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Power consumption, cache design, compiler optimization, instruction locality, translation look-aside buffer
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Optimizing instruction TLB energy using software and hardware techniques.
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