Instruction generation for hybrid reconfigurable systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/KastnerKOB02
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dcterms:
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http://dblp.uni-trier.de/rec/bibtex/journals/todaes/KastnerKOB02
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https://dblp.l3s.de/d2r/resource/authors/Elaheh_Bozorgzadeh
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https://dblp.l3s.de/d2r/resource/authors/Seda_Ogrenci_Memik
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dcterms:
issued
2002
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https://dblp.l3s.de/d2r/resource/journals/todaes
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Instruction generation for hybrid reconfigurable systems.
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swrc:
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4
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605-627
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dc:
subject
FPGA, high-level synthesis, reconfigurable computing
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title
Instruction generation for hybrid reconfigurable systems.
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