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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/LinHW97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Allen_C.-H._Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Cheng-Tsung_Hwang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yann-Rue_Lin>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F253052.253054>
foaf:homepage <https://doi.org/10.1145/253052.253054>
dc:identifier DBLP journals/todaes/LinHW97 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F253052.253054 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label Scheduling techniques for variable voltage low power designs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Allen_C.-H._Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Cheng-Tsung_Hwang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yann-Rue_Lin>
swrc:number 2 (xsd:string)
swrc:pages 81-97 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/LinHW97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/LinHW97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes2.html#LinHW97>
rdfs:seeAlso <https://doi.org/10.1145/253052.253054>
dc:subject high-level synthesis, lower power design, scheduling, variable voltage (xsd:string)
dc:title Scheduling techniques for variable voltage low power designs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 2 (xsd:string)