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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/LyseckyV02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Frank_Vahid>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Roman_L._Lysecky>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F504914.504917>
foaf:homepage <https://doi.org/10.1145/504914.504917>
dc:identifier DBLP journals/todaes/LyseckyV02 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F504914.504917 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label Prefetching for improved bus wrapper performance in cores. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Frank_Vahid>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Roman_L._Lysecky>
swrc:number 1 (xsd:string)
swrc:pages 58-90 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/LyseckyV02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/LyseckyV02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes7.html#LyseckyV02>
rdfs:seeAlso <https://doi.org/10.1145/504914.504917>
dc:subject Bus wrapper, PVCI, VSIA, cores, design reuse, intellectual property, interfacing, on-chip bus, system-on-a-chip (xsd:string)
dc:title Prefetching for improved bus wrapper performance in cores. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 7 (xsd:string)