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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/MichaelT02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Maria_K._Michael>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Spyros_Tragoudas>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F504914.504916>
foaf:homepage <https://doi.org/10.1145/504914.504916>
dc:identifier DBLP journals/todaes/MichaelT02 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F504914.504916 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label ATPG tools for delay faults at the functional level. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Maria_K._Michael>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Spyros_Tragoudas>
swrc:number 1 (xsd:string)
swrc:pages 33-57 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/MichaelT02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/MichaelT02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes7.html#MichaelT02>
rdfs:seeAlso <https://doi.org/10.1145/504914.504916>
dc:subject Automatic test pattern generation, Binary Decision Diagrams, Boolean Satisfiability, delay testing, functional-level testing, path delay fault simulation (coverage), path delay fault testing, testing digital circuits (xsd:string)
dc:title ATPG tools for delay faults at the functional level. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 7 (xsd:string)