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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/MoiseevKW09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Avinoam_Kolodny>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Konstantin_Moiseev>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shmuel_Wimer>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1562514.1562523>
foaf:homepage <https://doi.org/10.1145/1562514.1562523>
dc:identifier DBLP journals/todaes/MoiseevKW09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1562514.1562523 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label Power-delay optimization in VLSI microprocessors by wire spacing. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Avinoam_Kolodny>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Konstantin_Moiseev>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shmuel_Wimer>
swrc:number 4 (xsd:string)
swrc:pages 55:1-55:28 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/MoiseevKW09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/MoiseevKW09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes14.html#MoiseevKW09>
rdfs:seeAlso <https://doi.org/10.1145/1562514.1562523>
dc:subject Wire spacing, delay-optimization, interconnect optimization, power optimization (xsd:string)
dc:title Power-delay optimization in VLSI microprocessors by wire spacing. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 14 (xsd:string)