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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/PecenkaSK08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Luk%E2%88%9A%C2%B0s_Sekanina>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tomas_Pecenka>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Kot%E2%88%9A%C2%B0sek>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1367045.1367063>
foaf:homepage <https://doi.org/10.1145/1367045.1367063>
dc:identifier DBLP journals/todaes/PecenkaSK08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1367045.1367063 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label Evolution of synthetic RTL benchmark circuits with predefined testability. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Luk%E2%88%9A%C2%B0s_Sekanina>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tomas_Pecenka>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zdenek_Kot%E2%88%9A%C2%B0sek>
swrc:number 3 (xsd:string)
swrc:pages 54:1-54:21 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/PecenkaSK08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/PecenkaSK08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes13.html#PecenkaSK08>
rdfs:seeAlso <https://doi.org/10.1145/1367045.1367063>
dc:subject Benchmark circuit, evolvable hardware, testability analysis (xsd:string)
dc:title Evolution of synthetic RTL benchmark circuits with predefined testability. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 13 (xsd:string)