![[RDF data]](https://dblp.l3s.de/d2r/snorql/rdf_flyer.24.gif)
| Property | Value |
|---|---|
| dcterms:bibliographicCitation | <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/Pedram96> |
| dc:creator | <https://dblp.l3s.de/d2r/resource/authors/Massoud_Pedram> |
| foaf:homepage | <http://dx.doi.org/doi.org%2F10.1145%2F225871.225877> |
| foaf:homepage | <https://doi.org/10.1145/225871.225877> |
| dc:identifier | DBLP journals/todaes/Pedram96 (xsd:string) |
| dc:identifier | DOI doi.org%2F10.1145%2F225871.225877 (xsd:string) |
| dcterms:issued | 1996 (xsd:gYear) |
| swrc:journal | <https://dblp.l3s.de/d2r/resource/journals/todaes> |
| rdfs:label | Power minimization in IC design: principles and applications. (xsd:string) |
| foaf:maker | <https://dblp.l3s.de/d2r/resource/authors/Massoud_Pedram> |
| swrc:number | 1 (xsd:string) |
| swrc:pages | 3-56 (xsd:string) |
| owl:sameAs | <http://bibsonomy.org/uri/bibtexkey/journals/todaes/Pedram96/dblp> |
| owl:sameAs | <http://dblp.rkbexplorer.com/id/journals/todaes/Pedram96> |
| rdfs:seeAlso | <http://dblp.uni-trier.de/db/journals/todaes/todaes1.html#Pedram96> |
| rdfs:seeAlso | <https://doi.org/10.1145/225871.225877> |
| dc:subject | CMOS circuits, adiabatic circuits, computer-aided design of VLSI, dynamic power dissipation, energy-delay product, gated clocks, layout, low power layout, low power synthesis, lower-power design, power analysis and estimation, power management, power minimization and management, probabilistic analysis, silicon-on-insulator technology, statistical sampling, switched capacitance, switching activity, symbolic simulation, synthesis, system design (xsd:string) |
| dc:title | Power minimization in IC design: principles and applications. (xsd:string) |
| dc:type | <http://purl.org/dc/dcmitype/Text> |
| rdf:type | swrc:Article |
| rdf:type | foaf:Document |
| swrc:volume | 1 (xsd:string) |