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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/SuCJ01>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chauchin_Su>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Shyh-Jye_Jou>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yue-Tsang_Chen>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F375977.375981>
foaf:homepage <https://doi.org/10.1145/375977.375981>
dc:identifier DBLP journals/todaes/SuCJ01 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F375977.375981 (xsd:string)
dcterms:issued 2001 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label Intrinsic response for analog module testing using an analog testability bus. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chauchin_Su>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Shyh-Jye_Jou>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yue-Tsang_Chen>
swrc:number 2 (xsd:string)
swrc:pages 226-243 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/SuCJ01/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/SuCJ01>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes6.html#SuCJ01>
rdfs:seeAlso <https://doi.org/10.1145/375977.375981>
dc:subject analog testability bus, analog testing, boundary scan, design for testability, intrinsic response (xsd:string)
dc:title Intrinsic response for analog module testing using an analog testability bus. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 6 (xsd:string)