UST/DME: a clock tree router for general skew constraints.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/TsaoK02
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https://dblp.l3s.de/d2r/resource/authors/Chung-Wen_Albert_Tsao
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2002
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UST/DME: a clock tree router for general skew constraints.
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359-379
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dc:
subject
Useful Skew, clock tree, feasible skew range, incremental skew scheduling, merging and embedding, merging region
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title
UST/DME: a clock tree router for general skew constraints.
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