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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/WangAZ98>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jing_Zeng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Li-C._Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Magdy_S._Abadir>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F296333.296335>
foaf:homepage <https://doi.org/10.1145/296333.296335>
dc:identifier DBLP journals/todaes/WangAZ98 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F296333.296335 (xsd:string)
dcterms:issued 1998 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label On measuring the effectiveness of various design validation approaches for PowerPC microprocessor embedded arrays. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jing_Zeng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Li-C._Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Magdy_S._Abadir>
swrc:number 4 (xsd:string)
swrc:pages 524-532 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/WangAZ98/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/WangAZ98>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes3.html#WangAZ98>
rdfs:seeAlso <https://doi.org/10.1145/296333.296335>
dc:subject ATPG, assertion test generation, design error model, logic verification, symbolic trajectory evaluation, validation (xsd:string)
dc:title On measuring the effectiveness of various design validation approaches for PowerPC microprocessor embedded arrays. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 3 (xsd:string)