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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/todaes/WinogradSSMRH18>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gaurav_Shenoy>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hamid_Mahmoodi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hassan_Salmani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Houman_Homayoun>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Setareh_Rafatirad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ted_Winograd>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3236622>
foaf:homepage <https://doi.org/10.1145/3236622>
dc:identifier DBLP journals/todaes/WinogradSSMRH18 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3236622 (xsd:string)
dcterms:issued 2018 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/todaes>
rdfs:label Programmable Gates Using Hybrid CMOS-STT Design to Prevent IC Reverse Engineering. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gaurav_Shenoy>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hamid_Mahmoodi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hassan_Salmani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Houman_Homayoun>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Setareh_Rafatirad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ted_Winograd>
swrc:number 6 (xsd:string)
swrc:pages 76:1-76:21 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/todaes/WinogradSSMRH18/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/todaes/WinogradSSMRH18>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/todaes/todaes23.html#WinogradSSMRH18>
rdfs:seeAlso <https://doi.org/10.1145/3236622>
dc:title Programmable Gates Using Hybrid CMOS-STT Design to Prevent IC Reverse Engineering. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 23 (xsd:string)