On the construction of zero-deficiency parallel prefix circuits with minimum depth.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/todaes/ZhuCG06
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dcterms:
bibliographicCitation
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https://dblp.l3s.de/d2r/resource/authors/Chung-Kuan_Cheng
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Haikun_Zhu
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https://dblp.l3s.de/d2r/resource/authors/Ronald_L._Graham
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http://dx.doi.org/doi.org%2F10.1145%2F1142155.1142162
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DBLP journals/todaes/ZhuCG06
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DOI doi.org%2F10.1145%2F1142155.1142162
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dcterms:
issued
2006
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swrc:
journal
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On the construction of zero-deficiency parallel prefix circuits with minimum depth.
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swrc:
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2
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swrc:
pages
387-409
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dc:
subject
Zero-deficiency, depth-size trade-off, parallel prefix circuits
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title
On the construction of zero-deficiency parallel prefix circuits with minimum depth.
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11
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