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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/toms/DeshmukhYB23>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_Bosilca>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rio_Yokota>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sameer_Deshmukh>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3595178>
foaf:homepage <https://doi.org/10.1145/3595178>
dc:identifier DBLP journals/toms/DeshmukhYB23 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3595178 (xsd:string)
dcterms:issued 2023 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/toms>
rdfs:label Cache Optimization and Performance Modeling of Batched, Small, and Rectangular Matrix Multiplication on Intel, AMD, and Fujitsu Processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Bosilca>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rio_Yokota>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sameer_Deshmukh>
swrc:month September (xsd:string)
swrc:number 3 (xsd:string)
swrc:pages 23:1-23:29 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/toms/DeshmukhYB23/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/toms/DeshmukhYB23>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/toms/toms49.html#DeshmukhYB23>
rdfs:seeAlso <https://doi.org/10.1145/3595178>
dc:title Cache Optimization and Performance Modeling of Batched, Small, and Rectangular Matrix Multiplication on Intel, AMD, and Fujitsu Processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 49 (xsd:string)