Synthesizing Variable Instruction Issue Interpreters for Implementing Functional Parallelism on SIMD Computers.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tpds/Abu-GhazalehWFH97
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1997
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Synthesizing Variable Instruction Issue Interpreters for Implementing Functional Parallelism on SIMD Computers.
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412-423
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MIMD on SIMD, interpretation, variable instruction issue, scheduling instruction execution, SIMD computers.
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Synthesizing Variable Instruction Issue Interpreters for Implementing Functional Parallelism on SIMD Computers.
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