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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tpds/AzadFMM17>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amir_Mahdi_Hosseini_Monazzah>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hamed_Farbeh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seyed_Ghassem_Miremadi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zahra_Azad>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTPDS.2016.2628742>
foaf:homepage <https://doi.org/10.1109/TPDS.2016.2628742>
dc:identifier DBLP journals/tpds/AzadFMM17 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTPDS.2016.2628742 (xsd:string)
dcterms:issued 2017 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tpds>
rdfs:label An Efficient Protection Technique for Last Level STT-RAM Caches in Multi-Core Processors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amir_Mahdi_Hosseini_Monazzah>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hamed_Farbeh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seyed_Ghassem_Miremadi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zahra_Azad>
swrc:number 6 (xsd:string)
swrc:pages 1564-1577 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tpds/AzadFMM17/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tpds/AzadFMM17>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tpds/tpds28.html#AzadFMM17>
rdfs:seeAlso <https://doi.org/10.1109/TPDS.2016.2628742>
dc:title An Efficient Protection Technique for Last Level STT-RAM Caches in Multi-Core Processors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 28 (xsd:string)