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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tpds/ChoiY00>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lynn_Choi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Pen-Chung_Yew>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F71.850834>
foaf:homepage <https://doi.org/10.1109/71.850834>
dc:identifier DBLP journals/tpds/ChoiY00 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F71.850834 (xsd:string)
dcterms:issued 2000 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tpds>
rdfs:label Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lynn_Choi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Pen-Chung_Yew>
swrc:number 4 (xsd:string)
swrc:pages 375-394 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tpds/ChoiY00/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tpds/ChoiY00>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tpds/tpds11.html#ChoiY00>
rdfs:seeAlso <https://doi.org/10.1109/71.850834>
dc:subject Computer architecture, shared-memory multiprocessors, memory systems, cache coherence, compiler, performance evaluation. (xsd:string)
dc:title Hardware and Compiler-Directed Cache Coherence in Large-Scale Multiprocessors: Design Considerations and Performance Study. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 11 (xsd:string)