An Availability Model for MIN-Based Multiprocessors.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tpds/DasMTB93
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dcterms:
bibliographicCitation
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http://dblp.uni-trier.de/rec/bibtex/journals/tpds/DasMTB93
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dc:
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https://dblp.l3s.de/d2r/resource/authors/Chita_R._Das
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https://dblp.l3s.de/d2r/resource/authors/Laxmi_N._Bhuyan
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https://dblp.l3s.de/d2r/resource/authors/Lei_Tien
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creator
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https://dblp.l3s.de/d2r/resource/authors/Prasant_Mohapatra
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foaf:
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dc:
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DBLP journals/tpds/DasMTB93
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dc:
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DOI doi.org%2F10.1109%2F71.246073
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dcterms:
issued
1993
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swrc:
journal
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https://dblp.l3s.de/d2r/resource/journals/tpds
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rdfs:
label
An Availability Model for MIN-Based Multiprocessors.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chita_R._Das
>
foaf:
maker
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https://dblp.l3s.de/d2r/resource/authors/Laxmi_N._Bhuyan
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foaf:
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https://dblp.l3s.de/d2r/resource/authors/Lei_Tien
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https://dblp.l3s.de/d2r/resource/authors/Prasant_Mohapatra
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swrc:
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10
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swrc:
pages
1118-1129
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dc:
subject
availability model; MIN-based multiprocessors; multistage interconnection network;task-based availability; software package; HARP; processing elements; memory modules; steady state availabilities; transient availabilities; simulation; Markov processes; multiprocessor interconnection networks
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An Availability Model for MIN-Based Multiprocessors.
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swrc:Article
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4
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