A Concurrent Test Architecture for Massively Parallel Computers and Its Error Detection Capability.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tpds/HancuISS94
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/tpds/HancuISS94
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kazuhiko_Iwasaki
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mamoru_Sugie
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Marius_V._A._H%E2%88%9A%C4%98ncu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Yuji_Sato
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2F71.329671
>
foaf:
homepage
<
https://doi.org/10.1109/71.329671
>
dc:
identifier
DBLP journals/tpds/HancuISS94
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2F71.329671
(xsd:string)
dcterms:
issued
1994
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/tpds
>
rdfs:
label
A Concurrent Test Architecture for Massively Parallel Computers and Its Error Detection Capability.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kazuhiko_Iwasaki
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mamoru_Sugie
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Marius_V._A._H%E2%88%9A%C4%98ncu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Yuji_Sato
>
swrc:
number
11
(xsd:string)
swrc:
pages
1169-1184
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/tpds/HancuISS94/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/tpds/HancuISS94
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/tpds/tpds5.html#HancuISS94
>
rdfs:
seeAlso
<
https://doi.org/10.1109/71.329671
>
dc:
subject
parallel machines; computer testing; error detection; probability; network routing;concurrent test architecture; massively parallel computers; error detection; onlinemonitoring; multiprocessors; aliasing probability; system level monitoring; run-timetesting; data dependences; control dependences; message source address; messagedestination address; block compressed sequence; concurrent instruction compression;control flow checking; computational block; reference image; compilation; onlinesystem-level testing; signature analysis; data routing process; packet-switched routing
(xsd:string)
dc:
title
A Concurrent Test Architecture for Massively Parallel Computers and Its Error Detection Capability.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
5
(xsd:string)