Fast and Processor Efficient Parallel Matrix Multiplication Algorithms on a Linear Array With a Reconfigurable Pipelined Bus System.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/tpds/LiPZ98
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1998
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Fast and Processor Efficient Parallel Matrix Multiplication Algorithms on a Linear Array With a Reconfigurable Pipelined Bus System.
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8
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705-720
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dc:
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Compound algorithm, linear array, matrix multiplication, optical pipelined bus, reconfigurability, Strassen's algorithm.
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title
Fast and Processor Efficient Parallel Matrix Multiplication Algorithms on a Linear Array With a Reconfigurable Pipelined Bus System.
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