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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tpds/LinNOZ03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Albert_Y._Zomaya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Koji_Nakano>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rong_Lin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stephan_Olariu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTPDS.2003.1233714>
foaf:homepage <https://doi.org/10.1109/TPDS.2003.1233714>
dc:identifier DBLP journals/tpds/LinNOZ03 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTPDS.2003.1233714 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tpds>
rdfs:label An Efficient Parallel Prefix Sums Architecture with Domino Logic. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Albert_Y._Zomaya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Koji_Nakano>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rong_Lin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stephan_Olariu>
swrc:number 9 (xsd:string)
swrc:pages 922-931 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tpds/LinNOZ03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tpds/LinNOZ03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tpds/tpds14.html#LinNOZ03>
rdfs:seeAlso <https://doi.org/10.1109/TPDS.2003.1233714>
dc:subject Hardware-algorithms, shift switching, binary prefix sums, binary counting, scalable architectures, VLSI design, domino logic. (xsd:string)
dc:title An Efficient Parallel Prefix Sums Architecture with Domino Logic. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 14 (xsd:string)