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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tpds/PrasannaAM94>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Anant_Agarwal>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bruce_R._Musicus>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/G._N._Srinivasa_Prasanna>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F71.296318>
foaf:homepage <https://doi.org/10.1109/71.296318>
dc:identifier DBLP journals/tpds/PrasannaAM94 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F71.296318 (xsd:string)
dcterms:issued 1994 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tpds>
rdfs:label Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Anant_Agarwal>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bruce_R._Musicus>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G._N._Srinivasa_Prasanna>
swrc:number 7 (xsd:string)
swrc:pages 720-736 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tpds/PrasannaAM94/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tpds/PrasannaAM94>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tpds/tpds5.html#PrasannaAM94>
rdfs:seeAlso <https://doi.org/10.1109/71.296318>
dc:subject multiprocessing systems; program compilers; performance evaluation; hierarchicalcompilation; macro dataflow graphs; local memory; macro operations; precedenceconstraints; multiple nested loops; processor allocation; partitioning phase;close-to-optimal run-times; nested loops; prototype structure-driven compiler; SDC;performance; simulator; Alewife multiprocessor (xsd:string)
dc:title Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 5 (xsd:string)