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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tpds/SeznecL94>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_Seznec>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jacques_Lenfant>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F71.334907>
foaf:homepage <https://doi.org/10.1109/71.334907>
dc:identifier DBLP journals/tpds/SeznecL94 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F71.334907 (xsd:string)
dcterms:issued 1994 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tpds>
rdfs:label Interleaved Parallel Schemes. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andr%E2%88%9A%C2%A9_Seznec>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jacques_Lenfant>
swrc:number 12 (xsd:string)
swrc:pages 1329-1334 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tpds/SeznecL94/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tpds/SeznecL94>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tpds/tpds5.html#SeznecL94>
rdfs:seeAlso <https://doi.org/10.1109/71.334907>
dc:subject vector processor systems; parallel machines; synchronisation; interleaved parallelschemes; vector supercomputers; vector register processors; global highly interleavedmemory; memory throughput; synchronization mode; interconnection network (xsd:string)
dc:title Interleaved Parallel Schemes. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 5 (xsd:string)