[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tpds/YangTB92>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/George_Thangadurai>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Laxmi_N._Bhuyan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qing_Yang_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2F71.139202>
foaf:homepage <https://doi.org/10.1109/71.139202>
dc:identifier DBLP journals/tpds/YangTB92 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2F71.139202 (xsd:string)
dcterms:issued 1992 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tpds>
rdfs:label Design of an Adaptive Cache Coherence Protocol for Large Scale Multiprocessors. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/George_Thangadurai>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Laxmi_N._Bhuyan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qing_Yang_0001>
swrc:number 3 (xsd:string)
swrc:pages 281-293 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tpds/YangTB92/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tpds/YangTB92>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tpds/tpds3.html#YangTB92>
rdfs:seeAlso <https://doi.org/10.1109/71.139202>
dc:subject adaptive cache coherence protocol; cache-based multiprocessor; hierarchical network;multistage interconnection network; cache coherence scheme; buffer storage; memoryarchitecture; multiprocessor interconnection networks; protocols (xsd:string)
dc:title Design of an Adaptive Cache Coherence Protocol for Large Scale Multiprocessors. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 3 (xsd:string)