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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/trets/ChinW09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Scott_Y._L._Chin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Steven_J._E._Wilton>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1462586.1462587>
foaf:homepage <https://doi.org/10.1145/1462586.1462587>
dc:identifier DBLP journals/trets/ChinW09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1462586.1462587 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/trets>
rdfs:label Static and Dynamic Memory Footprint Reduction for FPGA Routing Algorithms. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Scott_Y._L._Chin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Steven_J._E._Wilton>
swrc:number 4 (xsd:string)
swrc:pages 18:1-18:20 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/trets/ChinW09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/trets/ChinW09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/trets/trets1.html#ChinW09>
rdfs:seeAlso <https://doi.org/10.1145/1462586.1462587>
dc:subject CAD, FPGA, memory, routing, scalability (xsd:string)
dc:title Static and Dynamic Memory Footprint Reduction for FPGA Routing Algorithms. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 1 (xsd:string)