Trust-Based Design and Check of FPGA Circuits Using Two-Level Randomized ECC Structures.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/trets/DuttL09
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Trust-Based Design and Check of FPGA Circuits Using Two-Level Randomized ECC Structures.
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Error-correcting codes, FPGAs, masking probability, parity groups, parity randomization, trust checking, trust-based design
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Trust-Based Design and Check of FPGA Circuits Using Two-Level Randomized ECC Structures.
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