On the trade-off between power and flexibility of FPGA clock networks. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

Property	Value
dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/journals/trets/LamoureuxW08>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Julien_Lamoureux>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Steven_J._E._Wilton>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F1391732.1391733>
foaf:homepage	<https://doi.org/10.1145/1391732.1391733>
dc:identifier	DBLP journals/trets/LamoureuxW08 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F1391732.1391733 (xsd:string)
dcterms:issued	2008 (xsd:gYear)
swrc:journal	<https://dblp.l3s.de/d2r/resource/journals/trets>
rdfs:label	On the trade-off between power and flexibility of FPGA clock networks. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Julien_Lamoureux>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Steven_J._E._Wilton>
swrc:number	3 (xsd:string)
swrc:pages	13:1-13:33 (xsd:string)
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/journals/trets/LamoureuxW08/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/journals/trets/LamoureuxW08>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/journals/trets/trets1.html#LamoureuxW08>
rdfs:seeAlso	<https://doi.org/10.1145/1391732.1391733>
dc:subject	FPGA, clock distribution networks, clock-aware placement, low-power design (xsd:string)
dc:title	On the trade-off between power and flexibility of FPGA clock networks. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:Article
rdf:type	foaf:Document
swrc:volume	1 (xsd:string)