Placement and Floorplanning in Dynamically Reconfigurable FPGAs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/journals/trets/MontoneSSM10
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/journals/trets/MontoneSSM10
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Alessio_Montone
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Donatella_Sciuto
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Marco_D._Santambrogio
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Seda_Ogrenci_Memik
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1862648.1862654
>
foaf:
homepage
<
https://doi.org/10.1145/1862648.1862654
>
dc:
identifier
DBLP journals/trets/MontoneSSM10
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1862648.1862654
(xsd:string)
dcterms:
issued
2010
(xsd:gYear)
swrc:
journal
<
https://dblp.l3s.de/d2r/resource/journals/trets
>
rdfs:
label
Placement and Floorplanning in Dynamically Reconfigurable FPGAs.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Alessio_Montone
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Donatella_Sciuto
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Marco_D._Santambrogio
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Seda_Ogrenci_Memik
>
swrc:
number
4
(xsd:string)
swrc:
pages
24:1-24:34
(xsd:string)
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/journals/trets/MontoneSSM10/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/journals/trets/MontoneSSM10
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/journals/trets/trets3.html#MontoneSSM10
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1862648.1862654
>
dc:
title
Placement and Floorplanning in Dynamically Reconfigurable FPGAs.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:Article
rdf:
type
foaf:Document
swrc:
volume
3
(xsd:string)