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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/journals/tse/BaghdadiZCJ02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ahmed_Amine_Jerraya>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amer_Baghdadi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Nacer-Eddine_Zergainoh>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wander_O._Ces%E2%88%9A%C2%B0rio>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FTSE.2002.1033223>
foaf:homepage <https://doi.org/10.1109/TSE.2002.1033223>
dc:identifier DBLP journals/tse/BaghdadiZCJ02 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FTSE.2002.1033223 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
swrc:journal <https://dblp.l3s.de/d2r/resource/journals/tse>
rdfs:label Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ahmed_Amine_Jerraya>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amer_Baghdadi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Nacer-Eddine_Zergainoh>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wander_O._Ces%E2%88%9A%C2%B0rio>
swrc:number 9 (xsd:string)
swrc:pages 822-831 (xsd:string)
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/journals/tse/BaghdadiZCJ02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/journals/tse/BaghdadiZCJ02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/journals/tse/tse28.html#BaghdadiZCJ02>
rdfs:seeAlso <https://doi.org/10.1109/TSE.2002.1033223>
dc:subject Performance estimation, architecture exploration, hardware/software codesign, multiprocessor architectures, system-level simulation. (xsd:string)
dc:title Combining a Performance Estimation Methodology with a Hardware/Software Codesign Flow Supporting Multiprocessor Systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:Article
rdf:type foaf:Document
swrc:volume 28 (xsd:string)